digitalelectronics

Given A and B are 64-bit inputs. With two selection lines s1 and s0 to perform the operations, A+B, A-B, AB, C+AB using Baugh Wooley multiplier

This is the repo is created for helping fellow Bilkenteers to pass their EEE102 Digital Electronics course. You can find Lab answers from Lab 1 to Final Project! Have fun!

Dumping all my childhood passion of electronics & electrical into this central repo. It can be DIY Projects of the past, Concepts gathered during B.Tech or the ones that I got to learn in K-12.

Verilog RTL Design

Hardware Schematic of Four Bit Signed Calculator designed using Xilinx ISE 14.7

Verilog Coding Practice Drive & Problem-solving in Electronics Circuit Design and Verification

AHB to APB Bridge Design and UVM-based Verification as per AMBA specifications.

Digital electronics | Motherboard of a diagnostic robotic complex.

A comprehensive collection of Verilog HDL implementations covering combinational and sequential logic. This repository demonstrates digital circuit design using gate-level, dataflow, and behavioral modeling styles, including verified testbenches for each module.All Solutions

Implementation of 4-bit Arithmetic Logic Unit using structural modeling in Verilog. Features 8 operations controlled by 3-bit select line. Simulated on EDA Playground with waveform analysis.

This is Digital Electronics Project Which is about door lock system. I used Tinkercad platform to create the project. In this project, i used 3x8 decoder and 2x1 multiplexer to draw the circuit.

Includes individual projects done. Simple projects to explore into the field of FPGA design

🎓 "Computer Engineering Diploma Projects" 💻 – Your one-stop resource for a diverse range of micro-projects designed for computer engineering diploma students. 🚀 Explore a collection of hands-on projects to enhance your skills and knowledge in various areas of computer engineering. 📚

This repository contains the design and implementation of a 4-bit Mealy Machine-based Overlapping Sequence Detector for detecting the sequence "1001" using 90nm CMOS technology and simulated in Cadence Virtuoso. The design employs SISO registers and master-negative edge-triggered D flip-flops within a Mealy machine architecture.

verilog coding and fpga implementation using protocols codes

Basic Arduino project for blinking of an on board LED as well as external LED.

Ram,Dual Port Ram using Verilog

Proyecto final de electrónica digital haciendo uso de una FPGA y sus respectivos periféricos en Quartus

HDL implementation of Digital Alarm Clock

This repository focuses on how to design a PWM Generator with variable Duty cycle