monaco-evk: Enable PCIe M.2 Key E connector - #893
monaco-evk: Enable PCIe M.2 Key E connector#893weiden (WeiDeng-weiden) wants to merge 5 commits into
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PR #893 — validate-patchPR: #893
Final Summary
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PR #893 — checker-log-analyzerPR: #893
Detailed report: Full report
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Adapted for vendor tree: applied to monaco-evk.dts after reverting the Bluetooth workaround from monaco-evk-common.dtsi. |
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Shiraz Hashim (shashim-quic)
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This reverts commit ba34902.
Add a reason as well, why.
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Added in the commit message. |
PR #893 — validate-patchPR: #893
Final Summary
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PR #893 — checker-log-analyzerPR: #893
Detailed report: Full report
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Test Matrix
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🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ BUILD SUCCEEDEDThe kernel build completed successfully with no compilation errors. The workflow failure occurred during the test submission phase, not during compilation.
Failure Root CauseThe PR did NOT introduce any build errors. The workflow failure was caused by: This is an infrastructure/network issue with the LAVA test submission service, not a code problem. Verdict0 of 0 errors are introduced by this PR. The build succeeded completely. The workflow failure is due to external infrastructure (LAVA server connectivity timeout) and is unrelated to the PR changes. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ SUCCESSFULBoth kernel builds (standard and RT) completed successfully with no compilation errors. Workflow Failure Root CauseThe workflow was marked as failed due to LAVA test server connectivity issues, not build failures.
Error patterns observed:
Verdict0 compilation errors. The PR introduces no build failures. The workflow failure is due to infrastructure issues (LAVA server unavailability) unrelated to the code changes in this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ SUCCESSBoth the regular kernel build and RT kernel build completed successfully with no compilation errors. Test Submission Status: ❌ FAILEDAll LAVA test job submissions failed due to LAVA server connectivity issues (not PR-related):
Verdict0 compilation errors found. The PR introduces only device tree changes ( 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ BUILD SUCCEEDEDThe kernel build completed successfully for both standard and RT configurations. The workflow failure was caused by LAVA test job submission failures, not compilation errors.
VerdictNo compilation errors were introduced by this PR. The workflow failure is due to test infrastructure issues (LAVA job submission), not code problems. All DT warnings observed are pre-existing and unrelated to the files modified in this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893
VerdictNo compilation errors found. The kernel build completed successfully for both default and RT variants. The workflow failure was caused by LAVA test infrastructure issues (502 Bad Gateway, 504 Gateway Timeout errors) when attempting to submit test jobs, not by any code introduced in this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ SUCCESSFULBoth kernel builds (standard and RT) completed successfully with no compilation errors. Workflow Failure Root CauseThe workflow was marked as failed due to LAVA test job submission failures, not build failures. All 10 test jobs failed to submit with the error:
VerdictZero compilation errors. The workflow failure is due to infrastructure (LAVA connectivity), not code issues introduced by this PR. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 VerdictNo compilation errors found. The kernel build completed successfully. The workflow failure was caused by a LAVA test infrastructure connection timeout during test job submission, not by any code issues in the PR. Build Status: ✅ SUCCESS Root CauseThe workflow was marked as failed because the LAVA job submission step timed out when attempting to connect to Error from test logs: PR Changes SummaryThis PR makes the following changes to device tree files:
All changes are device tree modifications only—no C code changes that could introduce compilation errors. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ SUCCESSBoth kernel builds (standard and RT) completed successfully with no compilation errors. Test Status: ❌ FAILED (Infrastructure Issue)All test jobs failed due to LAVA server connectivity issues, not due to code problems.
VerdictNo compilation errors were introduced by this PR. The workflow failure is entirely due to LAVA infrastructure connectivity issues at the time of the test run. The PR changes are safe to merge from a build perspective. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893 Build Status: ✅ SUCCESSBoth kernel builds (standard and RT) completed successfully with zero compilation errors.
Workflow Failure Root CauseThe workflow was marked as failed due to LAVA test job submission timeouts, NOT due to compilation errors. Error: All 10 test jobs (hamoa-iot-evk, lemans-evk, monaco-evk, purwa-iot-evk, qcs615-ride, qcs6490-rb3gen2, qcs8300-ride, qcs9100-ride-r3, qrb2210-rb1, shikra-iqs-evk) failed to submit to the LAVA server due to network connectivity issues. Verdict0 compilation errors found. The PR changes compile cleanly. The workflow failure is an infrastructure issue (LAVA server connectivity timeout), not a code quality issue. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #893PR: #893
Verdict✅ Build succeeded. Both standard and RT kernel builds completed successfully. The workflow failure was caused by LAVA test infrastructure issues (502 Bad Gateway errors when submitting test jobs), not by compilation problems. The PR changes compile cleanly. 📎 Detailed analysis: Full report |
Hi Salendarsingh Gaud (@sgaud-quic), could you please take a look at this LAVA infra issue? |
Test Matrix
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…etooth support" This reverts commit ba34902. The WORKAROUND commit modelled BT power supplies as fixed regulators to work around the missing M.2 Key E connector binding. Now that the proper M.2 solution is described in the subsequent commits, this workaround is no longer needed. Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
Add 'compatible = "pciclass,0604"' to the pcieport0 node in monaco.dtsi to allow the PCI subsystem to associate the DT node with the PCI-to-PCI bridge device. This is required for downstream DT nodes (such as M.2 connectors described as graph endpoints of the Root Port) to be matched to PCI devices. Link: https://lore.kernel.org/r/20260729-b4-monaco-evk-m2-v1-v2-1-0548e1dab760@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
…o pcieport0 and uart2 Add empty graph port/endpoint nodes to pcieport0 and uart2 in monaco.dtsi so that board files can reference the endpoint labels (pcieport0_ep, uart2_ep) to describe connections to M.2 Key E connectors via remote-endpoint overrides. Link: https://lore.kernel.org/r/20260729-b4-monaco-evk-m2-v1-v2-2-0548e1dab760@oss.qualcomm.com/ Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
…onnector The monaco EVK has a PCIe M.2 Mechanical Key E connector to connect wireless connectivity cards over PCIe and UART interfaces. Hence, describe the connector node and link it with the PCIe 0 Root Port and UART2 nodes through graph port/endpoint. The M.2 Key E connector is powered by a 3.3V fixed regulator (vreg_wcn_3p3) which is sourced from the board's 12V DC input rail (vreg_dcin_12v). Both regulators are always-on and are required by the pcie-m2-e-connector binding. Also add the serial1 = &uart2 alias, which is required for the Bluetooth serdev device to be enumerated on the UART2 interface. The graph endpoint anchors (pcieport0_ep, uart2_ep) referenced here are defined in monaco.dtsi (see "arm64: dts: qcom: monaco: Add graph port/endpoint anchors to pcieport0 and uart2"). Link: https://lore.kernel.org/r/20260729-b4-monaco-evk-m2-v1-v2-3-0548e1dab760@oss.qualcomm.com/ Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
…board file of_graph_is_present() only checks for the presence of a 'port' child node, not whether remote-endpoint is actually connected. Adding empty port anchor nodes to monaco.dtsi caused hci_qca to enter the M.2 pwrseq probe path on all monaco-based boards, including qcs8300-ride which has a soldered WCN6855 and no M.2 Key E connector. This broke BT initialization on qcs8300-ride. Fix this by moving the port/endpoint nodes from monaco.dtsi into the monaco-evk.dts board file where the M.2 connector is actually present, so that of_graph_is_present() only returns true for boards that have an M.2 Key E connector described. Fixes: 9a18d35 ("FROMLIST: arm64: dts: qcom: monaco: Add graph port/endpoint anchors to pcieport0 and uart2") Link: https://lore.kernel.org/all/20260819-b4-monaco-evk-m2-v1-v3-4-988145ef65cd@oss.qualcomm.com/ Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
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Enabling the PCIe M.2 Key E connector on Monaco EVK
and reverting the temporary Bluetooth workaround.
Revert BT workaround:
regulators to work around the missing M.2 binding. Now superseded by
the proper M.2 solution.
monaco.dtsi:
compatible = "pciclass,0604"to the PCIe Root Port node, requiredfor
pci_pwrctrlto associate the DT node with the PCI-to-PCI bridgepcieport0_ep,uart2_ep) so boardfiles can reference them via
remote-endpointmonaco-evk.dts:
graph endpoints, regulator properties (
vreg_wcn_3p3,vreg_dcin_12v)serial1 = &uart2alias required for Bluetooth serdev enumerationUpstream: https://lore.kernel.org/r/20260729-b4-monaco-evk-m2-v1-v2-0-0548e1dab760@oss.qualcomm.com/
CRs-Fixed: 4610036