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[CUDA] Add MoEPacked CPU/GPU hybrid offload and consolidate QMoE/GGUF offload optimizations - #33973
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Tianlei Wu (tianleiwu) wants to merge 5 commits into
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Tianlei Wu (tianleiwu) wants to merge 5 commits into
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…ffload optimizations Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
…zations - Replace MoEPackedParallelPool with qmoe::SpinPoolRegistry and pin doorbell thread to CpuForWorker(0), eliminating epoch/remaining counter race and scheduler barrier stalls - Add register-accumulator AVX2+FMA+F16C cold-expert kernels for IQ3_XXS, IQ4_XS, IQ2_S, IQ2_XXS, IQ2_XS, IQ4_NL, Q2_0, Q5_0, and mixed gate/up types with /arch:AVX2 on MSVC - Extend Int2Group8Avx512 to RT=1..4 and factor block scales into single FMA - Calibrate 16GB and 32GB WDDM post-session reserves for MoEPacked and QMoE, and filter PrefetchVirtualMemory by stream_skip Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Use checked workspace sizing for 8192-row offload prefills and allocate offload outputs before dispatch. Preserve shared-provider include ordering and enable the required AVX2, FMA, and F16C flags for Linux builds. Initialize pinned decode state correctly and preserve prefill staging type linkage under warnings-as-errors. Extend offload parity coverage to empty input and prefills beyond 2048 rows. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Merge pinned main 3bde254 (23 commits ahead of the previous merge base 548473f, the #33953 merge). Conflict resolution: js/react_native/e2e/test/OnnxruntimeModuleExample.test.js took main's version. Main already selects the EPContext button on iOS via testID/by.id (e2a328f). The branch's by.label selector matches two nested views on iOS ("Multiple elements found"), so the branch no longer touches the React Native e2e test. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Summary
This draft PR consolidates and optimizes CPU/GPU hybrid expert offload for
com.microsoft::MoEPacked(GGUF sub-byte block-packed experts) andcom.microsoft::QMoE(RC5 mixed-precision INT4/INT3/INT2 experts) across 16 GB (RTX 5060 Ti), 24 GB (RTX 4090), 32 GB (RTX 5090), and H200 GPUs.Stacked On
[CUDA] Improve QMoE offload decode throughput via AVX2 spill elimination and working-set retention)[CUDA] Tail expert substitution for QMoE offload decode (stacked on #33935))Support direct external initializer buffers in AddExternalInitializers)[CUDA] Add GatherPacked, MatMulPacked, and MoEPacked contrib ops for block-packed weights)Key Changes
com.microsoft::MoEPacked(session_state.cc,moe_packed.h,moe_packed.cu,moe_packed.cc):MoEPackedexpert weight initializers (gate_weights,up_weights,down_weights) on CPU (zero-copy file mapping) and implementsIMoeOffloadNodeadmission withQMoESessionController.MoEPackedOffloadClassifyAndBuildTilesKernel,MoEPackedDoorbellWaitKernel,MoEPackedOffloadFinalizeVec8Kernel, andLaunchQMoETailSubstitutionintegration) and 8,192-row double-buffered 32-expert wave-streaming prefill with D2D adaptive hot-expert promotion.qmoe::SpinPool& Register-Accumulator AVX2+FMA+F16C GGUF Cold-Expert Kernels (moe_packed.cc,cmake/onnxruntime_providers_cuda*.cmake):MoEPackedParallelPoolwithqmoe::SpinPoolRegistry(qmoe_spin_pool.h) and pinsMoEPackedDoorbellServicetoCpuForWorker(0).GgufDualDot2ChAvx2Tpl<RT>) and 4-column (IQ4_NL/Q2_0) AVX2+FMA+F16C kernels coveringIQ2_S,IQ2_XXS,IQ2_XS,IQ3_XXS,IQ4_XS,IQ4_NL,Q2_0,Q5_0, and mixedgate_type != up_typelayers, cuttingiq3_xxsCPU cold-expert latency 4.8x (245.5 us/exp -> 49.2 us/exp) and boostingiq3_xxsdecode throughput 4.1x (16.2–20.8 tok/s -> 67.2–81.7 tok/slossless,179.96 tok/swith tail substitution) andiq1_sdecode throughput up to142.91 tok/slossless (261.65 tok/swith tail substitution) on RTX 5090.QMoEINT2 Prefill & AVX-512 Cold-Expert Optimizations + 16 GB / 24 GB / 32 GB WDDM Reserve Calibration (qmoe_offload.cc,moe_gemv_tc.cuh,qmoe_shared_layout_int2_avx512.cc,qmoe_session_controller.h):MoeGemvTcInt2Kernelon sortedexpert_mapprefill waves (+24%to+30%faster8K/32Kprefill on2b375, reaching2,560 tok/s).Int2Group8Avx512toRT = 1..4with factored scale FMA.QMoEandMoEPackedand auto-detects 8-byte vs. 4-byteSTRPv1 popularity profiles.Accuracy & Performance Impact of Tail Expert Substitution ( hreshold = 0.02, min_rank = 2) on 2b375 (RTX 5090 32 GB)
Evaluated on qwen_flash_next_int4_int8_rc5_contrib_dflash2_qmoe_2b375_x02_y14_z32_dp23_b64_unified (xhigh reasoning, greedy decoding):