EDA/CAD algorithms engineer in training - I am currently focusing on physical design and algorithmic coursework, with embedded systems projects that show end-to-end engineering discipline.
- B.S. in Computer Science and Information Engineering, National Taiwan University of Science and Technology
- M.S. student (first year), Institute of Electronics, National Yang Ming Chiao Tung University
- CADathlon contestant at IEEE/ACM ICCAD 2025 (International Conference on Computer-Aided Design)
- Based in Hsinchu, Taiwan
On my desk right now — pico-paper-clock · epaper-home-display · esp32-hydracup, each running live with its own web dashboard
| Project | What it shows |
|---|---|
| eda-projects | Cleaned public versions of EDA coursework: clock tree synthesis, placement legalization, and ML-RCS scheduling. Benchmark files and official course materials are not redistributed. |
| filament-ledger | Shipped desktop app with automated Windows/macOS packaging and Bambu Cloud integration notes. |
| esp32-paper-frame | Offline-first ESP32-S3 photo frame on native ESP-IDF (no Arduino framework): host and on-target test layers, ADR-tracked design decisions, and an MVP feature set the owner has declared complete — real-device validated for OTA, provisioning, and sensors, with the remaining low-priority hardware checks tracked openly rather than hidden. |
| epaper-home-display | 9-coroutine asyncio service on RPi Zero 2W; dirty-region partial refresh for e-Paper; unit-testable hardware abstraction. |
| pico-paper-clock | Standalone MicroPython desk clock on a 264KB-RAM Pico W: memory-conscious firmware, host-side unit tests in CI, and packaged releases with firmware, enclosure CAD, and a Windows deployment tool. |
| esp32-hydracup | 6-state drink-detection FSM on an HX711 load cell; native host-side tests in CI; migrated to native ESP-IDF/FreeRTOS with OTA and rollback verification. |
- Starting my M.S. at NYCU Institute of Electronics this fall — coursework in physical design and EDA/CAD algorithms is my main focus this term.
- My IoT lineup (epaper-home-display, esp32-hydracup, esp32-paper-frame, pico-paper-clock, filament-ledger) is stable and in maintenance mode — tagged releases, host-side tests, and CI stay green, but active feature work is paused for the semester.
- Next up: EDA-side updates will follow wherever coursework and lab work lead, rather than a fixed roadmap.
Some repositories are coursework or teaching-language projects. They are presented as academic-scale implementations, not production tools. I do not redistribute unauthorized benchmark files, official course specs, or private grading materials.
- EDA / algorithms: C++, heuristics, ILP modeling with Gurobi, placement / routing / scheduling coursework
- Compiler / systems: flex/yacc, semantic analysis, Java assembly code generation, Python asyncio services
- Firmware: C/C++ on native ESP-IDF and FreeRTOS, plus PlatformIO/Arduino and MicroPython; ESP32 / ESP32-S3 / RP2040 / Raspberry Pi, MQTT, sensors, e-Paper, OTA with rollback
- Mechanical / CAD: SolidWorks (2019) for enclosure and structural part design — 3D-printed enclosures shipped with esp32-paper-frame, esp32-hydracup, and pico-paper-clock, plus general structural parts outside the IoT lineup
Robotics has been my through-line since childhood: I started with LEGO in fourth grade and competed in WRO from sixth through eighth grade — earning an Open Category merit award at the national round — which led me into programming. In high school I built LabVIEW + myRIO warehouse robots — TIRT Automated Warehouse Robot merit award (2020), 3rd place (2021) — and won the 18th National Technological Creativity Contest (2021). I later coached my alma mater's robotics team for skills competitions through my first three years of university.